Anusha
01-03-2007, 08:18 PM
Source: digitimes.com
Samsung Electronics has announced that it is now sampling 16Gb NAND flash memory manufactured on 50nm process technology. The first samples of will have a multi-level cell (MLC) design with a 4KB page size, with the company claiming that the jump to a 4KB page function improves the conventional 2KB paging system for MLC NAND flash to double the read speed, while increasing write performance 150%.
The company plans to begin mass-producing its 16Gb NAND flash memory in the first quarter of 2007. In September of 2006, Samsung also announced it has developed a 32Gb NAND flash device manufactured on 40nm node. The memory incorporated a charge trap flash (CTF) architecture, a new approach to further increase manufacturing efficiency while improving performance, according to the company.
Read the full story here. (http://www.digitimes.com/bits_chips/a20070103VL202.html)
Samsung Electronics has announced that it is now sampling 16Gb NAND flash memory manufactured on 50nm process technology. The first samples of will have a multi-level cell (MLC) design with a 4KB page size, with the company claiming that the jump to a 4KB page function improves the conventional 2KB paging system for MLC NAND flash to double the read speed, while increasing write performance 150%.
The company plans to begin mass-producing its 16Gb NAND flash memory in the first quarter of 2007. In September of 2006, Samsung also announced it has developed a 32Gb NAND flash device manufactured on 40nm node. The memory incorporated a charge trap flash (CTF) architecture, a new approach to further increase manufacturing efficiency while improving performance, according to the company.
Read the full story here. (http://www.digitimes.com/bits_chips/a20070103VL202.html)