Anusha
01-05-2007, 05:41 AM
With details of both Intel and AMD, Computerworld shows how 2007 might go down for both companies, based upon the confidential road maps of both Intel and AMD, it is clear that dual-core CPUs are only the launching point for the future of the microprocessor. In 2007, quad cores and even eight-core CPUs will be available. By 2009, there's a good chance that sixteen-core processors will be on the market.
At the high-end performance level, Intel will release three new quad-core CPUs at the beginning of the year, dubbed the Core 2 Quad Q6600, Q6400 and Q6300.
As Intel shifts to multicore processing, the bus speed becomes a more pressing concern because of the increased volume of data traffic generated by separate CPU cores. Thus, one of the most significant releases Intel will make in 2007 is a brand-new chip set foundation code-named "Bearlake." The P35 Express will be released first in the second quarter of 2007 and will feature two key upgrades: an all-new 1,333-MHz FSB and support for DDR2-800 and DDR3-1066 memory. The G35 chip set will feature an integrated DirectX 10-compatible graphics processor.
The P35 Express and X38 Express will be Intel's performance-oriented, high-end versions of Bearlake. The X38 will feature the same 1,333-MHz FSB and DDR2-800/DDR3-1066 memory support found in the P35 Express, and it will also feature two PCI-Express x16 slots and PCI Express 2.0, which is twice as fast as PCI-Express 1.0 (5 GHz, compared with 2.5 GHz).
At the same time it releases the Bearlake chip set, Intel will also release three speedy new Core 2 processors that are compatible with the Bearlake chip set's 1,333-MHz FSB and other new features, the E6850, E6750 and E6650. (The "50" designator in the model number indicates a FSB speed of 1,333-MHz).
Intel's 45nm process will manifest itself in a microprocessor architecture known only by the code name "Penryn." It appears that these processors will be based on the Core 2 architecture, but will take advantage of the 45nm processor to provide larger L2 caches and increased performance. (It's worth noting that Penryn will also serve as Intel's mobile processor architecture, with laptop CPUs scheduled for release in early 2008.)
In early Q3 2007, AMD is planning to release a brand-new performance-oriented 65nm CPU architecture code-named "Agena," and it sounds like a high-performance dream. One other impressive attribute of the Agena FX processor is that it will operate at a bus speed of 4 GHz, thanks to the 3.0 iteration of AMD's HyperTransport link that will debut at the same time. This doubles the bus speed of previous FX and other Athlon 64 processors. The Agena FX quad core will feature 2MB of shared L2 cache and 2MB of L3 cache.
In the middle of 2007, AMD will revise Socket AM2 to increase energy efficiency and bus speed. Currently scheduled for release at the end of Q2 2007, this revision will be named Socket AM2+.
Finally, in Q3 2007, AMD will release a new series of 65nm native dual-core processors aimed squarely at the mainstream consumer market. Currently code named "Kuma," these processors -- which emphasize power consumption and high performance-per-watt yields -- will operate at clock speeds from 2 GHz to 2.9 GHz and will contain 1MB of shared L2 cache and 2MB of shared L3 cache.
Read the full article here. (http://www.computerworld.com/action/article.do?command=viewArticleBasic&articleId=9006938&pageNumber=1)
At the high-end performance level, Intel will release three new quad-core CPUs at the beginning of the year, dubbed the Core 2 Quad Q6600, Q6400 and Q6300.
As Intel shifts to multicore processing, the bus speed becomes a more pressing concern because of the increased volume of data traffic generated by separate CPU cores. Thus, one of the most significant releases Intel will make in 2007 is a brand-new chip set foundation code-named "Bearlake." The P35 Express will be released first in the second quarter of 2007 and will feature two key upgrades: an all-new 1,333-MHz FSB and support for DDR2-800 and DDR3-1066 memory. The G35 chip set will feature an integrated DirectX 10-compatible graphics processor.
The P35 Express and X38 Express will be Intel's performance-oriented, high-end versions of Bearlake. The X38 will feature the same 1,333-MHz FSB and DDR2-800/DDR3-1066 memory support found in the P35 Express, and it will also feature two PCI-Express x16 slots and PCI Express 2.0, which is twice as fast as PCI-Express 1.0 (5 GHz, compared with 2.5 GHz).
At the same time it releases the Bearlake chip set, Intel will also release three speedy new Core 2 processors that are compatible with the Bearlake chip set's 1,333-MHz FSB and other new features, the E6850, E6750 and E6650. (The "50" designator in the model number indicates a FSB speed of 1,333-MHz).
Intel's 45nm process will manifest itself in a microprocessor architecture known only by the code name "Penryn." It appears that these processors will be based on the Core 2 architecture, but will take advantage of the 45nm processor to provide larger L2 caches and increased performance. (It's worth noting that Penryn will also serve as Intel's mobile processor architecture, with laptop CPUs scheduled for release in early 2008.)
In early Q3 2007, AMD is planning to release a brand-new performance-oriented 65nm CPU architecture code-named "Agena," and it sounds like a high-performance dream. One other impressive attribute of the Agena FX processor is that it will operate at a bus speed of 4 GHz, thanks to the 3.0 iteration of AMD's HyperTransport link that will debut at the same time. This doubles the bus speed of previous FX and other Athlon 64 processors. The Agena FX quad core will feature 2MB of shared L2 cache and 2MB of L3 cache.
In the middle of 2007, AMD will revise Socket AM2 to increase energy efficiency and bus speed. Currently scheduled for release at the end of Q2 2007, this revision will be named Socket AM2+.
Finally, in Q3 2007, AMD will release a new series of 65nm native dual-core processors aimed squarely at the mainstream consumer market. Currently code named "Kuma," these processors -- which emphasize power consumption and high performance-per-watt yields -- will operate at clock speeds from 2 GHz to 2.9 GHz and will contain 1MB of shared L2 cache and 2MB of shared L3 cache.
Read the full article here. (http://www.computerworld.com/action/article.do?command=viewArticleBasic&articleId=9006938&pageNumber=1)